This invention relates to a process for interconnecting stacked packages, each package encapsulating an electronic component which may be passive or active, discrete or integrated, a semiconductor chip containing for example an integrated circuit, or one or several sensors. These components will henceforth be referred to indiscriminately as components or chips. The invention also relates to a resulting so-called three dimensional, or 3D, component.
The design of current electronic systems, both civilian and military, must take into account increasingly stringent requirements in terms of compactness, owing to the increasing number of circuits implemented. To this end, the stacking of integrated circuits has already been proposed, as described for instance in the U.S. Pat. No. 4,706,166. According to this method, the chips themselves are arranged on a printed circuit, mounted in contact with each other perpendicularly to the printed circuit; the connecting pads of each chip are all located on one side of the chip; this is the side resting on the printed circuit to which the connections are made. However, this arrangement presents limitations associated with the number of pads which it is physically possible to fit on one side of a semiconductor chip. Further, it is a costly solution owing to the fact that the chips are not standard (the pad layout must be changed). Also, the connections made are difficult to access and are not visible, which is a requirement in some cases, this, consequently limits the use of the chips.
An object of the invention is to avoid the said limitations by stacking and then interconnecting, not the chips, but rather packages containing the components, the packages mounting on grids, and by using the stacking faces as the interconnecting faces.
In this way, the drawbacks and the limitations mentioned above are avoided and the costs are reduced: in fact, and notably in the case of semiconductor chips, chips housed in a (usually plastic) package are available on the market at lower prices than those commonly charged for the chips alone, mainly for reasons of quantities manufactured, and, in addition, testing of the packaged chips is more convenient and therefore less costly. Moreover, mounting each of the packages on a grid facilitates the formation of the pile and provides a heat shunt.
More specifically, according to the invention, packages containing components and fitted with pins, are each mounted on a heat (and preferably electrical) conducting grid. The packages, together with their grids, are stacked; the packages are then tied together by means of an insulating material such as for example, a polymer resin. The resulting stack is then cut out so that the pins of the packages and preferably at least one side of the grids are flush with the sides of the stack, and then electric connections are made between the pins on the sides of the stack.